It is not a multi-die implementation. V1000 is Raven Ridge.

“Zeon”(?)

No that just the embedded version of the mobile/desktop Raven Ridge “APU”( Now called Ryzen with Vega Graphics) variants that also use the infinity fabric. These Ryzen V1000 variants have a little more features enabled compared to the consumer variants and AMD’s infinity fabric is made use of for on die functional block communication as well as between dies and between socket coherency communication on Zen/Zeppelin and Raven Ridge APUs for CPU core to GPU cores interfacing on die other functional on die blocks interfacing. V1000 is AFAIK not modular like the Zen/Zeppelin die as V1000 lacks the off die IF functional blocks necessary compared to Zen/Zeppelin. That Zen/Vega “APU” based V1000 has replaced the external off die IF functional blocks with Video decoder blocks and other functionality related to the GPU/graphics but the single CCX to wired to the Vega GPU’s nCU(Next genration Compute units) via the on die Infinity Fabric also.

The that V1000 “APU” is most likely just an embedded variant of the Raven Ridge “APUs” and look at the wattage, with 2 of the listed variants are desktop wattage and the other 2 are mobile wattage. But the embedded market makes no distinction as in embedded there is low power and middle to higher power usage.

The Infinity Fabric is definitly an on die functional Block interconnect as well as being a between CCX, between die, and between socket data and control fabric that includes the coherency across caches ability also, and Charlie Demerjian over at S/A goes into greater detail on that matter than most had at the time or even currently with respect to the Infinity Fabric’s potential across all of AMD’s CPU/GPU/other processor offerings.

I will say this though even if the Current V1000 lines may be just the embedded versions of the Raven Ridge consumer “APU” variants, it is entirely feasible for AMD to create such a scalable modular “APU” die design by just adding back any off die IF functional blocks to the design and that would be an interesting creation in and of itself.

I’m never one to fully trust and abstracted block diagram to tell what is on die and what is off so a die shot with notes(1) on wikichip always helps clear up matters. I’d also recommend reading Charlie’s article over at semiaccurate(2) from a while back but stiil the most relevent as to what the Infininty Fabric is and what the IF IP implies going forward for AMD. Also the Zeppelin die presentation slides from SlideShare (3) from ISSCC 2018 is available and that has the latest information with new information with regards to the Zen/Zeppelin modular die that is used for all of AMD’s consumer mainstream(Ryzen 3, 5, 7) and Threadripper/HEDT variants on up to all of AMD’s Epyc lines of processors.

(1) [look towards the bottom where the Raven Ridge APU die shots and material is located]

“Zen – Microarchitectures – AMD”

https://en.wikichip.org/wiki/amd/microarchitectures/zen

(2)

“AMD Infinity Fabric underpins everything they will make
The future is not quite here yet but it will be
Jan 19, 2017 by Charlie Demerjian ”

https://semiaccurate.com/2017/01/19/amd-infinity-fabric-underpins-everything-will-make/

(3) [Deeper Dive into the Zen “Zeppelin” modular scalable DIE with updated information]

“ISSCC 2018: “Zeppelin”: an SoC for Multi-chip Architectures ”

https://www.slideshare.net/AMD/isscc-2018-zeppelin-an-soc-for-multichip-architectures